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| HITFET= BTS 3110 N Smart Lowside Power Switch Features Logic Level Input Input Protection (ESD) Thermal shutdown Overload protection Short circuit protection Overvoltage protection Current limitation Analog driving possible 2 1 VPS05163 Product Summary Drain source voltage On-state resistance Nominal load current Clamping energy VDS RDS(on) I D(Nom) EAS 42 200 1.4 150 V m A mJ HITFET Current Limitation In Pin 1 OvervoltageProtection Gate-Driving Unit Overtemperature Protection ESD Overload Protection Short circuit Protection Pin 3 Source Page 1 4 3 Application All kinds of resistive, inductive and capacitive loads in switching or linear applications C compatible power switch for 12 V DC applications Replaces electromechanical relays and discrete circuits technology. Fully protected by embedded Vbb General Description N channel vertical power FET in Smart SIPMOS protection functions. M Drain Pin 2 and 4 (TAB) 2002-09-04 BTS 3110 N Maximum Ratings at T j = 25C, unless otherwise specified Parameter Drain source voltage Drain source voltage for short circuit protection T j = -40...150C Continuous input current VIN < -0.2V or VIN > 10V Operating temperature Storage temperature Power dissipation T C = 85 C Unclamped single pulse inductive energy 1) Load dump protection VLoadDump2) = V A + VS EAS VLD 150 50 mJ V Tj Tstg Ptot IIN no limit -40 ...+150 -55 ... +150 3.8 W mA Symbol VDS VDS(SC) Value 42 18 Unit V Electrostatic discharge voltage (Human Body Model) VESD according to MIL STD 883D, method 3015.7 and EOS/ESD assn. standard S5.1 - 1993 DIN humidity category, DIN 40 040 IEC climatic category; DIN IEC 68-1 Thermal resistance junction - ambient: @ min. footprint @ 6 cm2 cooling area 3) junction-soldering point: RthJS RthJA 1 Not tested, specified by design. 2VLoaddump is setup without the DUT connected to the generator per ISO 7637-1 and DIN 40839 3 Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6cm2 (one layer, 70m thick) copper area for drain connection. PCB mounted vertical without blown air. RL = 9 , VA = 13.5 V VIN = 0 and 10 V, t d = 400 ms, RI = 2 , 2 kV E 40/150/56 125 72 17 K/W Page 2 -0.2V VIN 10V | IIN | 2 C K/W 2002-09-04 BTS 3110 N Electrical Characteristics Parameter at Tj = 25C, unless otherwise specified Characteristics Drain source clamp voltage Tj = - 40 ...+ 150, ID = 10 mA Off-state drain current Tj = -40 ... +150C VDS = 32 V, VIN = 0 V Input threshold voltage ID = 0.15 mA, Tj = 25 C ID = 0.15 mA, Tj = 150 C On state input current On-state resistance VIN = 5 V, ID = 1.4 A, Tj = 25 C VIN = 5 V, ID = 1.4 A, Tj = 150 C On-state resistance VIN = 10 V, ID = 1.4 A, Tj = 25 C VIN = 10 V, ID = 1.4 A, Tj = 150 C Nominal load current VDS = 0.5 V, Tj < 150C, VIN = 10 V, TA = 85 C Current limit (active if VDS>2.5 V)1) VIN = 10 V, VDS = 12 V, tm = 200 s ID(lim) ID(Nom) 1.4 5 7.5 10 RDS(on) 150 280 200 400 A IIN(on) RDS(on) 190 350 240 480 VIN(th) 1.3 0.8 1.7 10 2.2 30 A m V IDSS 1.5 10 A VDS(AZ) 42 55 V Symbol min. Values typ. max. Unit 1Device switched on into existing short circuit (see diagram Determination of I D(lim)). If the device is in on condition and a short circuit occurs, these values might be exceeded for max. 50 s. Page 3 2002-09-04 BTS 3110 N Electrical Characteristics Parameter at Tj = 25C, unless otherwise specified Dynamic Characteristics Turn-on time VIN to 90% I D: t on t off -dV DS/dt on dV DS/dt off 45 60 0.4 0.6 100 100 1.5 1.5 V/s s Symbol min. Values typ. max. Unit Protection Functions1) Thermal overload trip temperature Input current protection mode Input current protection mode Tj = 150 C Unclamped single pulse inductive energy 2) ID = 1.4 A, Tj = 25 C, Vbb = 12 V EAS 150 mJ Tjt IIN(Prot) IIN(Prot) 150 25 175 50 40 300 300 C A Inverse Diode Inverse diode forward voltage IF = 7 A, tm = 250 s, VIN = 0 V, tP = 300 s VSD 1 V 1Integrated protection functions are designed to prevent IC destruction under fault conditions described in the data sheet. Fault conditions are considered as "outside" normal operating range. Protection functions are not designed for continuous repetitive operation. 2 Not tested, specified by design. Page 4 RL = 4.7 RL = 4.7 , VIN = 0 to 10 V, Vbb = 12 V Slew rate off 50 to 70% Vbb: , VIN = 10 to 0 V, Vbb = 12 V RL = 4.7 , VIN = 10 to 0 V, Vbb = 12 V Slew rate on 70 to 50% Vbb: RL = 4.7 , VIN = 0 to 10 V, Vbb = 12 V Turn-off time VIN to 10% ID: 2002-09-04 BTS 3110 N Block diagram Terms Inductive and overvoltage output clamp RL V I IN 1 IN HITFET S 3 D 2 ID VDS Vbb Z D S VIN HITFET Input circuit (ESD protection) V Gate Drive Input Short circuit behaviour IN I IN t Source/ Ground I D t T t j t Page 5 2002-09-04 BTS 3110 N 1 Maximum allowable power dissipation Ptot = f(TS) resp. Ptot = f(TA) @ R thJA=72 K/W 10 W 2 On-state resistance RON = f(T j); ID=1.4A; V IN=10V 500 m 8 7 400 max. RDS(on) max. 350 300 250 200 150 100 50 typ. Ptot 6 5 4 3 2 6cm2 1 0 -75 100 C -50 -25 0 25 50 75 150 0 -50 -25 0 25 50 75 100 125 C 175 TS ;TA Tj 3 On-state resistance RON = f(Tj ); ID= 1.4A; VIN=5V 500 4 Typ. input threshold voltage VIN(th) = f(T j); ID = 0.15 mA; V DS = 12V 2 V max. m 400 1.6 RDS(on) 350 300 250 200 150 100 50 0 -50 100 125 C VGS(th) typ. 1.4 1.2 1 0.8 0.6 0.4 0.2 -25 0 25 50 75 175 0 -50 -25 0 25 50 75 100 C 150 Tj Page 6 Tj 2002-09-04 BTS 3110 N 5 Typ. transfer characteristics ID=f(VIN ); VDS=12V; TJstart=25C 8 A 6 Typ. short circuit current I D(lim) = f(Tj); VDS=12V Parameter: VIN 10 A 8 6 ID 5 I D(lim) 7 6 5 5V Vin=10V 4 3 4 3 2 2 1 1 V 0 0 1 2 3 4 5 6 7 8 10 0 -50 -25 0 25 50 75 100 125 C 175 VIN Tj 7 Typ. output characteristics ID=f(VDS ); TJstart =25C Parameter: VIN 10 A Vin=10V 7V 8 Typ. off-state drain current IDSS = f(Tj ) 11 A max. 8 6V 9 5V 4V 7 8 I DSS ID 6 5 4 7 6 5 4 3 2 1 0 0 V 3V 3 2 1 typ. 1 2 3 4 6 0 -50 -25 0 25 50 75 100 125 C 175 VDS Page 7 Tj 2002-09-04 BTS 3110 N 9 Typ. overload current ID(lim) = f(t), Vbb =12 V, no heatsink Parameter: Tjstart 12 10 Typ. transient thermal impedance Z thJA=f(tp) @ 6 cm2 cooling area Parameter: D=tp/T 10 2 K/W D=0.5 0.2 0.1 A -40C 10 1 I D(lim) 8 ZthJA 25C 85C 0.05 0.02 0.01 6 150C 10 0 4 10 -1 2 Single pulse 0 0 0.5 1 1.5 2 2.5 3 ms t 4 10 -2 -7 -6 -5 -4 -3 -2 -1 0 1 2 10 10 10 10 10 10 10 10 10 10 s 10 4 tp 11 Determination of ID(lim) ID(lim) = f(t); tm = 200s Parameter: TJstart 12 A I D(lim) 8 -40C 25C 6 85C 4 150C 2 0 0 0.1 0.2 0.3 0.4 ms 0.55 t Page 8 2002-09-04 BTS 3110 N Package SOT-223 A 6.5 0.2 3 0.1 B 4 Ordering Code Q67060-S6088-A101 1.6 0.1 0.1 max 7 0.3 15 max 1 0.7 0.1 2 3 2.3 4.6 0.5 min 0.28 0.04 0.25 M A 0.25 M B GPS05560 3.5 0.2 +0.2 acc. to DIN 6784 Page 9 2002-09-04 BTS 3110 N Published by Infineon Technologies AG, Bereichs Kommunikation St.-Martin-Strasse 53, D-81541 Munchen (c) Infineon Technologies AG 1999 All Rights Reserved. Attention please! The information herein is given to describe certain components and shall not be considered as warranted characteristics. Terms of delivery and rights to technical change reserved. We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and charts stated herein. Infineon Technologies is an approved CECC manufacturer. Information For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office in Germany or our Infineon Technologies Reprensatives worldwide (see address list). Warnings Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies Office. Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Page 10 2002-09-04 |
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